Free Range VHDL

The no-frills guide to writing powerful code for your digital implementations

Bryan Mealy Fabrizio Tappero

Free Range VHDL

VHDL (VHSIC hardware description language) is a hardware description language used in electronic design automation to describe digital and mixed-signal systems such as field-programmable gate arrays and integrated circuits.(From

VHDL has a rich and interesting history1. But since knowing this historyis probably not going to help you write better VHDL code, it will only bebriey mentioned here. Consulting other, lengthier texts or search engineswill provide more information for those who are interested. Regarding theVHDL acronym, the V is short for yet another acronym: VHSIC or VeryHigh-Speed Integrated Circuit. The HDL stands for Hardware DescriptionLanguage. Clearly, the state of technical a airs these days has done awaywith the need for nested acronyms. VHDL is a true computer languagewith the accompanying set of syntax and usage rules. But, as opposed tohigher-level computer languages, VHDL is primarily used to describe hard-ware. The tendency for most people familiar with a higher-level computerlanguage such as C or Java is to view VHDL as just another computer lan-guage. This is not altogether a bad approach if such a view facilitates theunderstanding and memorization of the language syntax and structure.The common mistake made by someone with this approach is to attemptto program in VHDL as they would program a higher-level computer lan-guage. Higher-level computer languages are sequential in nature; VHDLis not.VHDL was invented to describe hardware and in fact VHDL is a con-current language. What this means is that, normally, VHDL instructionsare all executed at the same time (concurrently), regardless of the size ofyour implementation. Another way of looking at this is that higher-levelcomputer languages are used to describe algorithms (sequential execu-tion) and VHDL is used to describe hardware (parallel execution). Thisinherent di erence should necessarily encourage you to re-think how youwrite your VHDL code. Attempts to write VHDL code with a high-levellanguage style generally result in VHDL code that no one understands.Moreover, the tools used to synthesize2 this type of code have a tendencyto generate circuits that generally do not work correctly and have bugsthat are nearly impossible to trace. And if the circuit does actually work,it will most likely be inefficient due to the fact that the resulting hardwarewas unnecessarily large and overly complex. This problem is compoundedas the size and complexity of your circuits becomes greater.

Submitted by sasvari on Feb. 14, 2012, 8:54 a.m.
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